目錄表

MCRTsim v2.8

A simulation framework for DVFS-capable Multi-core Real-Time Systems.

Introduction

MCRTsim is an open source task scheduling simulator, or real-time systems with uniprocessors, multiprocessors, and multi-core processors. It contains a task set generator, a set of real-time schedulers and synchronization protocols, and a comprehensive set of tools including visualized execution tracer, schedulability analyzer, and measurement and statistic modules. Therefore, we can easy to evaluate the performance of existing scheduling algorithms as well as synchronization protocols by using MCRTsim. Furthermore, MCRTsim also contains a Java class library for supporting the design of new scheduling and synchronization protocols with minimum efforts. Another key feature of MCRTsim is the supporting of DVFS-capable processors so that the capabilities of energy-aware scheduling algorithms and synchronization protocols can be better understand.

People

Project Leader:Dr. Jun Wu.

Project Members:Shiu-Jia Hong, Yu-Cheng Huang and Hsin-Hsien Yu

Development Tools

Algorithms

MCRTsim Function Modules


MCRTsim Function Modules

User Interface


User Guide

Download

MCRTsim v2.8

Example Experimental Settings (from a paper submitted to RACS 2018)

RACS2018

Last Updated

2018/06/30 18:32 : 發佈MCRTsim v2.8
2017/11/01 11:55 : 發佈MCRTsim v2.0
2017/05/08 19:48 : 發佈MCRTsim v1.0
2016/06/01 13:50 : 發佈MCRTsim v0.1

Publications about MCRTsim

Publications using MCRTsim